Forming semiconductor devices typically includes performing a series of processes that add, remove, and/or alter materials in and/or on a substrate or other assembly. Cumulatively, these processes can precisely form very high densities of transistors, capacitors, diodes, conductive lines, dielectric structures, and other components of an integrated circuit. The electrical connections between the electrical components can be complex and typically extend over and through multiple layers of dielectric, conductive and semiconductive materials. Electrical connections from one layer to another layer can be formed in openings or holes, which can be selectively etched in desired patterns. For example, through-substrate vias (TSVs) are formed in TSV holes that extend through the substrate or packaging material such that the TSVs can electrically couple bond pads or other contacts on opposite sides of a wafer or package. Such openings and TSV holes are typically lined with a dielectric material, e.g., silicon dioxide, to electrically isolate the metal or other conductive material within the openings from the semiconductor substrate or other nearby structures. Depositing dielectric liners exclusively in the openings can be technically challenging, so dielectric liners are generally formed by depositing a continuous layer (i.e., conformal blanket layer) of dielectric liner material over the front-side of the wafer and into the openings, and performing an etch-back process to completely remove the portion of the dielectric liner material from the backside or front-side outer surface of the wafer.
Conventionally, the dielectric liner material on the outer surface of the wafer is removed using a chemical-mechanical planarization process with a suitable slurry (“spacer CMP”) before filling the TSV holes with a conductive material. Spacer CMP processes seek to remove the top portion of the continuous dielectric liner material without damaging underlying structures by removing the dielectric materials and metals at significantly different rates and having a relatively thick low-k dielectric material underneath the dielectric liner material. Moreover, after forming the TSVs, a permanent dielectric material separate from the dielectric liner material is deposited and patterned to form trenches over the TSVs and other contacts that are spaced laterally apart from the TSVs. The trenches are then filled with a conductive material to form conductive lines that are electrically coupled to corresponding contacts and TSVs. Conventional TSV manufacturing requires several process steps and materials that increase the complexity of the manufacturing process. Accordingly, there is a need for innovation in this area and in related areas of semiconductor device manufacturing.